The SN74LS161A is a synchronous, presettable 4-bit binary counter with internal carry look-ahead for high-speed counting applications. All flip-flops are clocked simultaneously, eliminating output counting spikes. The counter can be preset to any 4-bit value via parallel data inputs A-D when LOAD is low. Both count enable inputs (ENP and ENT) must be high for counting to occur.
CLR (pin 1) and LOAD (pin 9) are active low inputs. Both ENP and ENT must be high for counting. RCO goes high when counter reaches 15 (1111) and ENT is high, enabling cascaded stages. Counter increments on rising edge of CLK when enabled.