The SN74LS74A contains two independent D-type positive-edge-triggered flip-flops with preset and clear inputs. A LOW level at the preset or clear inputs sets or resets the outputs regardless of other input levels. When preset and clear are inactive (HIGH), data at the D input meeting setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse.